AMD Expands TSA Side-Channel Exposure Beyond Zen 3 and Zen 4 Processors

AMD has expanded its guidance on Transient Scheduler Attacks (TSA), speculative timing side channels that can expose data across security contexts. Its November 10 update adds Family 1Ah Models 00h–4Fh and 60h–7Fh to the affected processor scope, beyond previously identified Family 19h products, and introduces TSA-FILL alongside TSA-L1 and TSA-SQ. AMD believes exploitation generally requires arbitrary code execution on the target machine and repeated interactions with a victim, rather than delivery through malicious websites. Xen’s XSA-471 advisory identifies TSA-SQ as CVE-2024-36350 and TSA-L1 as CVE-2024-36357, warning that attackers could potentially infer data from other Xen guests despite existing protections.

Remediation requires coordinated CPU microcode and operating-system or hypervisor updates. AMD calls for privileged VERW-based scrubbing at relevant security transitions and before processor idle states, with potential performance costs. Xen states that all versions are affected when running on vulnerable processors and provides patches for xen-unstable and Xen 4.17–4.20; its advisory lists no workaround. That advisory’s initial processor assessment was limited to AMD Family 19h Zen 3 and Zen 4 CPUs, so operators should reassess hardware exposure against AMD’s expanded guidance rather than rely solely on the older scope. SEV-SNP guest owners should verify host microcode through attestation, as AMD recommends.