CVE-2024-36357, also known as Transient Scheduler Attack, L1 (TSA-L1), is a transient-execution side-channel vulnerability affecting some AMD processors, including AMD Zen 3 and Zen 4 systems. During specific microarchitectural timing windows, the CPU transient scheduler can speculatively retrieve stale data from the L1 data cache. A local attacker may use side-channel measurements to infer this data across privileged execution boundaries.
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What it means. What to do now. Patch path, mitigations, and the assume-compromise checklist.
What an attacker gets, and what they’ve been doing with it.
If you can’t patch tonight, do this now.
Patch, then assume compromise.
No public exploits tracked yet. Mallory keeps watching.
No public exploit code observed for this vulnerability.
Products and vendors Mallory has correlated with this vulnerability. Open in Mallory to drill down to specific CPE configurations and version ranges.
Vendor-confirmed product mapping. Mallory continuously reconciles this list against your asset inventory.
19 sources tracked across advisories, community write-ups, and news. New activity surfaces here as Mallory finds it.
AMD processor transient-execution vulnerability addressed through the kernel update.
Transient-execution vulnerability affecting some AMD processors.
A transient-execution vulnerability in the Linux kernel affecting some AMD processors, fixed through the Red Hat Enterprise Linux 9 kernel security update.
A moderate-severity transient-execution vulnerability affecting some AMD processors that can expose sensitive L1D-cache data across privilege boundaries.
Query your assets running an affected version, and investigate the blast radius.
Every observed campaign linking this CVE to a named adversary.
Malware families riding this exploit, with evidence and IOCs.
YARA, Sigma, Snort, and vendor rules, auto-deployed to your SIEM.
Cross-references every affected SKU, including bundled OEM variants.
Community discussion across Reddit, Mastodon, and other social sources.